HC32M140KATA
XHSC· Series HC32M140Lifecycle: Not stated
Cortex-M0+ · 48 MHz · 128 KB · 8 KB · 2.7 ~ 5.5 V · LQFP64
HC32M140KATA-LQ64
Key specifications
CPU core
Cortex-M0+
Max CPU frequency
48 MHz
Program Flash
128 KB
SRAM
8 KB
Operating voltage
2.7 ~ 5.5 V
Operating temperature
-40 ~ 85°C
Package
LQFP64
GPIO count
55
ADC resolution
12
ADC channels
16
All parameters
| Core | |
| CPU core | Cortex-M0+(Series-wide parameter) |
| Max CPU frequency | 48 MHz |
| Memory | |
| Program Flash | 128 KB |
| SRAM | 8 KB |
| Power & environment | |
| Operating voltage | 2.7 ~ 5.5 V(Series-wide parameter) |
| Operating temperature | -40 ~ 85°C |
| Lowest-power mode current | 8.7 µA(Series-wide parameter) mode=stop mode (停止模式), VDD=DVCC=AVCC=5.5 V, temp=25°C, stat=typ, notes=all ports fixed output L, LVD off, flash standby |
| Package & IO | |
| Package | LQFP64 |
| Package size | 7x7 |
| Pin count | 64 |
| GPIO count | 55 |
| Analog | |
| ADC resolution | 12(Series-wide parameter) |
| ADC channels | 16 |
| ADC sample rate | 1 MSPS(Series-wide parameter) |
| Analog comparators | 1 |
| Op-amps / PGA | 2 |
| Timers & control | |
| DMA channels | 2 |
| Reliability | |
| ESD (HBM) | 2 kV(Series-wide parameter) temp=TA=+25°C, standard=JESD22-A114, stat=typ |
| Flash endurance | 20,000 cycles(Series-wide parameter) stat=min, note=target value (目标值) |
| Flash data retention | 100 years(Series-wide parameter) temp=25°C, stat=min, note=target value (目标值) |
Values are read by software from the exact location in the manufacturer's document and cross-checked. The latest manufacturer datasheet prevails.
Same series (3)
| PN | Max CPU frequency | Program Flash | SRAM | Operating temperature | Package | GPIO count |
|---|---|---|---|---|---|---|
| HC32M140F8TA | 48 MHz | 64 KB | 8 KB | -40 ~ 85°C | LQFP32 | 26 |
| HC32M140J8TA | 48 MHz | 64 KB | 8 KB | -40 ~ 85°C | TQFP48 | 41 |
| HC32M140J8UA | 48 MHz | 64 KB | 8 KB | -40 ~ 85°C | QFN48 | 41 |