Quectel SP900BF-AP Packs Dragonwing IQ-9075 into a 65 mm LGA Module: 100 Dense TOPS, 36 GB LPDDR5X and a 10-Year Lifecycle Commitment

On 11 November in Munich, Quectel announced the SP900BF-AP, a flagship Linux smart module built on Qualcomm's Dragonwing IQ-9075 processor. Quectel's release and product page put on-device AI performance at up to 100 TOPS; Qualcomm describes the same silicon as delivering up to 100 dense TOPS, or 200 equivalent sparse TOPS. Memory runs to 36 GB LPDDR5X with 256 GB UFS, the package is a 65 mm × 65 mm × 4.55 mm LGA rated from -40 °C to +85 °C, and Quectel commits to a product lifecycle of up to 10 years. The release says the module has completed key technical validation, with engineering samples available to selected customers for evaluation and joint development.

Three numbers: compute, memory, years of supply

The module reads along three axes. On compute, the IQ-9075 provides an octa-core Kryo CPU at up to 2.36 GHz, an Adreno 663 GPU, a Hexagon DSP with HVX vector and HMX matrix extensions, dual Hexagon Tensor Processors and a dedicated NPU. That heterogeneity matters because vision pre-processing, inference and real-time control can be dispatched to different units instead of all landing on the NPU. On memory, 36 GB of LPDDR5X is unusual at this tier, paired with 256 GB of UFS and justified by real-time multi-stream video and multiple displays. On time, the 10-year commitment is stated explicitly, on the reasoning that industrial equipment stays in the field for that long.

The multimedia block deserves a separate line: the Adreno 765 VPU supports 4K@120 fps encode and 4K@240 fps decode, with a Spectra ISP handling multi-camera pre-processing. For inline inspection equipment, encode capability decides whether raw frames can be retained or streamed back, not just whether inference results get out.

The TOPS question: dense and sparse are a factor of two apart

"100 TOPS" carries at least two meanings on today's shelves. Qualcomm's IQ-9075 product page is explicit: the SoC ships in a 50 TOPS configuration requiring two PMICs and a 100 TOPS configuration requiring four, with the table footnoted as dense TOPS; Qualcomm's documentation also states "100 dense TOPS / 200 equivalent sparse TOPS". A module quoting the sparse number at the same headline figure therefore delivers half the dense throughput.

A ready comparison: NVIDIA's Jetson Orin NX 16GB data sheet lists 100 (sparse) INT8 TOPS and 50 (dense) INT8 TOPS, rising to 157 sparse / 78 dense under MAXN_SUPER. Put the marketing figures side by side in a selection matrix and the conclusion is "equal compute"; switch to dense and the IQ-9075's 100 TOPS is double. The reverse also holds: if an algorithm genuinely exploits structured sparsity, the sparse ceiling needs its own measurement. At minimum, a buyer should pin down three things — dense or sparse, INT8 or INT4, and whether the peak includes dedicated matrix units.

Four cameras and a real-time domain: built for inspection and AMR

Quectel names three target scenarios: autonomous mobile robots with four-camera support, 3D perception and on-device navigation; production-line inspection with real-time defect detection that keeps sensitive data on site; and edge AI gateways running large language and vision-language models such as Qwen, DeepSeek, Gemma and LLaVA locally. What those three share is not peak compute but a pattern: many video streams in, deterministic control out.

• Cameras: the module exposes four camera inputs, while the IQ-9075 SoC itself supports up to 16 concurrent cameras — a ceiling documented on Lantronix's IQ-9075 evaluation kit and across Advantech's platforms on the same silicon. Headroom for expansion lives in the SoC, not the module.
• Real-time domain: the IQ-9075 integrates a four-core real-time MCU subsystem, so motion control and timing-critical tasks can run alongside inference. This is the line between an industrial controller and a consumer AI box.
• Temperature and qualification: Quectel specifies -40 °C to +85 °C, an industrial range. Qualcomm's own IQ-9075M module carries AEC-Q100 Grade 3. An operating range and an automotive qualification regime are different things and do not substitute for each other.
• Interfaces: PCIe, USB 3.1, UART, SPI and I²C, with 4G/5G or Wi-Fi added per deployment.

Software is still in development: Ubuntu and Yocto marked as pending

The release says the module is designed to run Ubuntu and Yocto Linux "with support currently in development". That phrasing carries weight: hardware specifications can be published early, but volume ramp depends on BSP maturity, drivers and a validated peripheral list. Teams that have already shipped on Qualcomm platforms will find the migration cost concentrated in ISP tuning and isolation of the real-time subsystem; teams new to the IQ9 series should note that getting an algorithm running on a sample is not the same as passing multi-camera and long-duration stability tests in production.

Quectel's counterweight is tooling it already markets: ModelForge for conversion and optimisation, ModelInfer for on-device inference and AI Playground for validation on real hardware, sitting behind Qualcomm AI Hub's pre-optimised model library. Toolchain value only becomes visible at model revision time — when a new version lands, someone has to re-quantise and re-run regression, and that workload is among the most under-estimated parts of a ramp.

Three form factors on one SoC: what a module vendor actually sells

Quectel is not alone on the IQ-9075. Qualcomm's own IQ-9075M module measures the same 65 mm × 65 mm × 4.55 mm, pairs three 12 GB ECC LPDDR5 devices with AEC-Q100 Grade 3 qualification; Advantech launched four products on the platform in August, including the SMARC 2.2 AOM-6741 with four 4-lane MIPI-CSI inputs, the ASR-A503/AFE-A503 robot controllers supporting up to eight GMSL cameras, and the fanless AIR-055 inference system; Lantronix takes the evaluation-kit route. Quectel's combination is an LGA module, its own toolchain and a 10-year supply commitment.

Three form factors on one SoC means competition has moved off the die. What a module buyer purchases is three things: a validated BSP, a peripheral set that survives the customer's reliability tests, and an orderable part number ten years out. The first two decide whether a project lands on schedule; the third decides maintenance cost across the product's life. Advantech's advantage sits in system and robot-controller form factors and camera interface count; Quectel's in module-level integration and tooling; Qualcomm's reference module sets a separate baseline with ECC memory and automotive qualification.

The cost variable: 36 GB of memory in an up-cycle

Putting 36 GB of LPDDR5X on a module is a decision that needs its own line in the pricing model in 2026. Counterpoint's mobile DRAM tracker shows 12 GB LPDDR5X contract prices up 9.2% quarter-on-quarter and 360.5% year-on-year in Q3 2026; TrendForce expects conventional DRAM contract prices to rise another 10–15% QoQ in Q4, with mobile DRAM allocation staying tight as AI and server demand absorb capacity.

The implication is that two modules on the same SoC with the same 100 TOPS can differ by a full tier in BOM once memory configuration diverges. Two years ago 36 GB was headroom; today it is the line most likely to be negotiated on its own — and it is also what a 13B-parameter model needs at the bandwidth level. Compute and memory are no longer independent optimisation variables.

HSY Perspective

The competitive axis for edge AI modules has moved from the headline TOPS figure to how much memory backs each TOPS and how many years the part stays orderable. Fitting 100 dense TOPS and 36 GB of LPDDR5X into a 65 mm square shows compute is no longer the constraint: Qualcomm's published 12 tokens/s on a 13B-parameter model depends on that memory bandwidth. Counterpoint puts 12 GB LPDDR5X contract prices up 360.5% year-on-year in Q3 2026, and TrendForce projects another 10–15% QoQ for conventional DRAM in Q4, which makes memory the most sensitive line on a quote.

The 10-year commitment carries the same weight. Industrial customers pay for an orderable part a decade out because a respin means re-validation, and that cost dwarfs the unit-price gap. Our read is that differentiation over the next year will concentrate on three verifiable items: memory capacity and whether it carries ECC, whether dense TOPS is stated explicitly, and whether the lifecycle claim comes with written supply terms.

The boundary is model size and memory supply. The judgment holds while models stay at or below 13B and LPDDR5X does not tighten again before 2027; should prices fall, the compute tier becomes the primary comparison again. Where an algorithm runs at 3B–7B on no more than four cameras, the 50 TOPS two-PMIC configuration will be the cheaper choice, and the 100 TOPS variant will appear mainly where 3D perception or multi-stream vision-language workloads justify it. Software maturity is the remaining variable: with Ubuntu and Yocto support still in development, ramp timing will be set by the BSP and driver list rather than by a date in a release.

Sources: Quectel, "Quectel SP900BF-AP Smart Module Sets the Pace for Edge AI with 100 TOPS of Computing Power" (11 November 2026, Munich, via Business Wire); Quectel SP900BF-AP product page; Qualcomm IQ-9075 and IQ-9075M product pages and documentation, including the 50/100 TOPS configurations and dense-TOPS footnotes; NVIDIA, Jetson Orin NX Series Data Sheet; Advantech release of 21 August 2026 and product pages for AOM-6741, ASR-A503 and AIR-055; Lantronix IQ-9075 evaluation kit page; Counterpoint Research mobile DRAM price tracker (updated 6 November 2026); TrendForce mobile DRAM contract price outlook for 4Q26 (30 October 2026).