Nuvoton Expands NuMicro MA35D0 with LQFP128 Compact MPUs and the Chili Pro Linux Platform
Nuvoton's Oct 1, 2026 launch adds three LQFP128 compact MPUs to the NuMicro MA35D0 series (MA35D05KH67C/KI67C/KJ67C): dual Cortex-A35 at 650 MHz plus a 180 MHz Cortex-M4, up to 512 MB of DDR SDRAM stacked in a 14 x 14 mm package to cut PCB layers and EMI, TSI security aligned with IEC 62443 and the EU CRA, and the Chili Pro board Nuvoton calls the industry's smallest Linux platform.
Nuvoton Technology on October 1, 2026 announced three LQFP128 compact-package microprocessors in its NuMicro MA35D0 series — the MA35D05KH67C, MA35D05KI67C and MA35D05KJ67C — alongside the NuMaker-IoT-MA35D0-A2 (Chili Pro) development board, which the company calls the industry's smallest Linux platform. The three parts stack up to 512 MB of DDR SDRAM inside a 14 x 14 mm LQFP128 package and target industrial edge devices, smart gateways and renewable energy systems.
Three New Parts: DDR Stacked into LQFP128
The MA35D0 series already shipped in LQFP216 and BGA packages; this expansion puts the same core into a package with fewer pins and simpler assembly and routing. Key configuration:
- Cores: dual 64-bit Arm Cortex-A35 up to 650 MHz, 32/32 KB L1 per core and 512 KB shared L2, plus a 180 MHz Arm Cortex-M4 real-time core for control loops and Tiny AI/ML inference;
- Memory: 384 KB on-chip SRAM (256 KB system plus 128 KB RTP), 128 KB internal boot ROM, and stacked DDR SDRAM in three tiers — 128 MB (MA35D05KH67C), 256 MB (MA35D05KI67C) and 512 MB (MA35D05KJ67C);
- Package: LQFP128 with EPAD, 14 x 14 mm, DDR3L stacked;
- Boot: secure boot from USB, SD/eMMC, NAND or SPI Flash (SPI NOR/SPI NAND).
Putting DDR inside the package pulls PCB layer count, board area and EMI down together. DDR routing is usually the part of an industrial gateway board that drives layer count and impedance control, so LQFP128 with in-package DRAM gives six- to eight-layer BGA designs a route to four layers. That is the intent of this expansion: not a higher compute ceiling, but a lower engineering barrier to production.
TSI Security: IEC 62443 and the EU CRA Move into the Selection Table
All three parts integrate Nuvoton's Trusted Secure Island (TSI), an isolated security hardware unit in which security operations execute. Capabilities include:
- Arm TrustZone and Secure Boot;
- Hardware crypto engines for AES, SHA, ECC, RSA, SM2/SM3/SM4 and a TRNG;
- Key Store and OTP memory.
Nuvoton ties TSI explicitly to "IEC 62443 certification requirements" and positions the family against the EU Cyber Resilience Act (CRA). Both terms deserve unpacking. IEC 62443 is the industrial automation and control systems security series: 62443-4-2 sets technical security requirements for IACS components, while 62443-4-1 covers the secure development lifecycle. The CRA timeline is harder: the regulation entered into force on 10 December 2024, its Article 14 reporting obligations apply from 11 September 2026, and the main obligations apply from 11 December 2027; under the legislative text, manufacturers must handle vulnerabilities for a support period of generally no less than five years — longer for industrial control equipment, which tends to stay in service far longer. Device makers exporting to the EU will soon have to answer whether their upstream components can supply security capabilities and the evidence behind them.
Connectivity and Display: Standard Industrial Gateway Fare
Interfaces continue the MA35D0 line: Gigabit Ethernet MAC, USB 2.0 High-Speed host and device, SD 3.0/eMMC, CAN FD, Quad SPI, UART, I2C, I2S, PWM and ADC. The display subsystem offers RGB 24/18-bit TFT-LCD up to 1280 x 800 at 60 fps, plus a 2D graphics engine and JPEG decoder. Target applications listed by Nuvoton are factory automation, industrial control, smart buildings, smart home, smart gateways and new energy.
Chili Pro: The "Industry's Smallest Linux Platform"
The NuMaker-IoT-MA35D0-A2 (Chili Pro) carries the MA35D05KI67C (LQFP128, 256 MB in-package DDR) with on-board Gigabit Ethernet (RGMII PHY and RJ45), two high-speed USB ports (one host/device, one host), an SD 3.0 slot, 256 MB Quad SPI NAND, a DA9062-3A PMIC, a UART0 debug port and a SWJ (JTAG plus SWD) header. Two GPIO expansion headers break out six UARTs, four CAN FD channels, SPI, two I2C buses, I2S and two ADC channels by default. The ecosystem supports embedded Linux with GUI libraries including emWin AppWizard, LVGL and Qt.
"Smallest" needs a caveat: Nuvoton means the development platform form factor, not the package size of the processor itself. What matters in evaluation is on-board DRAM capacity, network interfaces and expansion headers against the target application.
Why Now: A Replacement Cycle in Industrial Edge
Mordor Intelligence puts the industrial edge computing market at USD 61.67 billion in 2026, up from USD 54.46 billion in 2025, on the way to USD 114.87 billion by 2031 at a 13.24% CAGR; hardware took 45.02% of 2025 revenue and manufacturing 42.10% of the market. The same firm sizes the IoT gateway market at USD 2.49 billion in 2026 growing to USD 4.51 billion by 2031 (12.61% CAGR), with processors accounting for 32.75% of gateway cost structure. The direction is the same: gateway and industrial control replacement is steady stock demand, and competition is shifting from clock speed toward BOM and compliance cost.
HSY Perspective
The real variable in this expansion is the package, not the 650 MHz. The dual Cortex-A35 core is shared with existing MA35D0 and MA35D1 parts, and the clock ceiling is not what these new SKUs contribute. LQFP128 with in-package DDR changes a different question: whether a hardware team has to go BGA and six to eight layers at all. For smaller industrial gateway and new-energy vendors, building on a four-layer board with standard reflow matters more to project timing and volume ramp than another hundred megahertz.
Layering the regulatory clock on top strengthens that reading. The CRA's vulnerability and incident reporting obligations took effect on 11 September 2026, the main obligations apply from 11 December 2027, and the support period is generally no less than five years (European Commission, digital-strategy pages). Any EU-facing device project started in the next twelve months therefore needs a line in its selection table for upstream security capability and evidence. The auditable items on the component side are TrustZone, secure boot, hardware crypto and key storage; an isolated unit such as TSI matters because it takes security operations out of main-core software and makes the capability itself reviewable.
The boundary of this judgment is worth stating. It holds for projects with EU shipments or customer security audits; for domestic equipment on closed networks the CRA weight drops sharply and package cost remains the main variable. A second boundary is terminology: Nuvoton's claim of meeting IEC 62443 requirements describes a design aligned with the standard's clauses, not a third-party certificate held by the part itself — capability and certificate should be checked separately. If industrial edge demand grows at a low-teens rate, LQFP with in-package memory should attract followers, and the competitive variable will move from clock speed to the combination of package and memory configuration.
Sources: Nuvoton press release (Oct 1, 2026, Hsinchu) and MA35D0 series, MA35D05KI67C and NuMaker-IoT-MA35D0-A2 product pages; European Commission Cyber Resilience Act policy page and legislative summary; IEC 62443-4-2:2019; Mordor Intelligence industrial edge computing and IoT gateway market reports (2026).