Nuvoton's Gerda HMI Controller Joins Qt for MCUs: On-Chip 5–10MB RAM Removes External DRAM from Clusters, HUDs and Appliance Panels

On November 5, Nuvoton Technology Corporation Japan (NTCJ) and Qt Group announced that Gerda™ — Nuvoton's HMI controller platform — is now supported as target hardware for Qt for MCUs. The claim the two companies are staking the announcement on is narrow and checkable: high-resolution graphics, smooth animation and responsive touch on automotive and motorcycle instrument clusters, head-up displays and home appliance panels, without an external memory device, at a bill of materials that high-volume programs can carry.

What "supported" actually changes

An MCU being listed as target hardware for a GUI framework is not news by itself; Qt for MCUs already ships platform ports for evaluation kits from Renesas, Infineon, NXP and ST. What is different here is that the memory budget became a joint engineering item rather than a footnote. Qt for MCUs' graphics optimizations — resource compression, partial framebuffering, on-demand decoding — are paired with Gerda's texture compression to shrink the GUI's RAM footprint, and that saving sits on top of the RAM already inside the controller. The result is a standalone HMI system with no external DRAM or HyperRAM: fewer components, lower system cost, smaller board area.

The practical change for development teams is asset reuse. QML-described interfaces, prebuilt GUI components and the simulation environment can be deployed straight onto Gerda hardware, so design and software teams no longer maintain parallel implementations. Nuvoton's release also mentions Qt for MCUs' "agentic AI skills," meaning AI-assisted development wired into the toolchain. That point is still a capability claim without published metrics, but it matches Qt's direction of embedding AI assistance across the development environment.

The silicon underneath: three RAM tiers

Gerda is Nuvoton's automotive HMI display controller family; its fourth generation, the KM2KS series, was announced on May 20, 2025. According to the current product page, "no external memory" is not a single blanket specification:

• Gerda-4M — Cortex-M7, 1920×480 recommended, MIPI-CSI2 input with single LVDS output, 8MB or 10MB embedded RAM, QFP-216, aimed at e-mirror and HUD; the external memory interface is limited to S-Flash, including boot flash.
• Gerda-4L — Cortex-M7, 1280×800 recommended, MIPI-CSI2 with single LVDS, 5MB or 6MB embedded RAM, QFP-216 or QFP-256, aimed at HUD and clusters; external S-Flash or SDRAM optional.
• Gerda-4UL — Cortex-M33, 800×480 recommended, no MIPI input, single or digital output, 3.5MB embedded RAM, QFP-100/128/144, aimed at motorcycle clusters, HUD and HVAC panels; external S-Flash or HyperRAM optional.

All three share 2.5D graphics and image processing engines, an on-chip HSM supporting EVITA-Full for secure boot and OTA updates, and ASIL-B functional safety support. This is a part aimed at clusters, HUDs and appliance panels — moderate resolution, 2D and 2.5D graphics, functional safety required — not at the cockpit-domain SoC running 3D content across multiple displays.

Why "no external DRAM" is worth something right now

What makes the proposition persuasive is not graphics throughput but memory pricing. TrendForce's September 30, 2026 survey found DRAM suppliers continuing to prioritize advanced-node capacity for server products in 4Q26, leaving the market undersupplied, with conventional DRAM contract prices projected to rise 10–15% quarter over quarter and NAND Flash contract prices 15–20%. The same report notes that as capacity shifts further toward servers, PC DRAM supply could decline in 2027.

That curve transmits into mature-node, small-density parts used in appliances, two-wheelers and clusters. These products are acutely sensitive to single-component cost: one external DRAM's increase can absorb the savings from a panel or a mechanical part, and its lead time and allocation are not the OEM's to decide. Folding the GUI's memory budget into on-chip RAM removes that variable from the purchasing list entirely.

Doing the memory arithmetic

Qt's documentation gives the framebuffer formula as width × height × bytes per pixel × number of buffers. At 16bpp:

• 800×480, double buffered: roughly 1.54MB — matching the reference value in Qt's own table;
• 1280×800, double buffered: roughly 4.10MB;
• 1920×480, double buffered: roughly 3.69MB, or 1.84MB single buffered.

That is only the framebuffer. A typical Qt Quick Ultralite application needs 400–700KB of resident RAM at medium resolution and color depth, 2MB or more at the high end, plus 500KB to 10MB of flash for images and fonts. Gerda-4L's 5–6MB and Gerda-4M's 8–10MB cover the "double buffer plus GUI assets plus headroom" bracket, while the 3.5MB in Gerda-4UL fits 800×480 with single or partial buffering. The "no external memory" claim therefore follows from arithmetic rather than marketing language.

Three consequences for part selection

• BOM and board — removing the DRAM device also removes its rail, decoupling and DDR routing; a four-layer board may collapse to two, and EMC debug items drop with it. For high-volume clusters and appliance panels, that is a cents-level difference that decides margin.
• Security and updates — EVITA-Full-class HSM plus secure boot gives OTA interface changes a hardware foundation. As software-defined vehicle practice spreads to two-wheelers and appliances, this moves from differentiator to entry requirement.
• Development pace — the QML and prebuilt-component path shortens the loop from design file to prototype, but the trade-off is commercial licensing for the toolchain and runtime, a cost that never appears on the BOM yet lands squarely in the project budget.

Where the limits are

Three qualifications matter. Qt for MCUs runs Qt Quick Ultralite, a lightweight runtime rather than the full Qt stack used on desktop or embedded Linux; the widget ecosystem and C++ surface are trimmed, so modules accumulated on the desktop side do not transfer. The embedded RAM ceiling also caps resolution: beyond 1920×480 with double buffering, or where multi-layer composition, 3D scenes or multiple independent displays are required, the answer remains a SoC with external DRAM. And Gerda's published functional safety level is ASIL-B, so an ASIL-D cluster safety island still needs an external watchdog and safety monitor rather than a single HMI controller. The two demonstrations Nuvoton will run at electronica 2026 (November 10–13, Messe München, Hall B5, stand 360) — a motorcycle cluster and a washing machine panel — sit precisely inside that envelope.

HSY Perspective

What this partnership changes is the cost structure of the HMI controller, not the menu of GUI toolchains: memory moves from a market-priced purchased part to a parameter baked into the chip's price. Clusters and appliance panels have long faced a binary choice — an SoC with DRAM, capable graphics but a BOM and lead time hostage to the memory cycle, or an MCU without external memory, controllable cost but coarse interfaces. TrendForce expects conventional DRAM contract prices up another 10–15% quarter over quarter in 4Q26, with capacity continuing to shift toward servers and PC DRAM supply possibly declining in 2027. In that environment a few tens of percent on a small DRAM is enough to turn "save a memory device" from a design preference into a financial constraint. Putting 5–10MB on die moves that volatility off the purchasing list.

The technical support for that judgment is framebuffer arithmetic, not press-release language. A 1280×800 panel at 16bpp with double buffering needs 4.10MB; 1920×480 needs 3.69MB; add 400–700KB of runtime and GUI assets, and Gerda-4L's 5–6MB and Gerda-4M's 8–10MB land in the bracket that is sufficient with margin. Qt's resource compression and partial buffering have to work on top of that before the margin becomes real. Toolchain and memory both have to line up for the combination to mean anything in production — a support statement without RAM headroom sends the customer's first UI back for rework.

The boundary deserves stating or the judgment will be misapplied. Above 1920×480, or where multi-layer composition and 3D are needed, embedded RAM is immediately insufficient and the SoC-plus-DRAM route returns. Functional safety stops at ASIL-B, so ASIL-D cluster islands require external monitoring. And when the memory cycle reverses and DRAM prices fall, the absolute cost advantage of an external device reappears and the calculation inverts. The durable reading: while memory stays a seller's market and the interface work is 2D/2.5D in volume parts, "no external memory" becomes a screening criterion rather than a bonus; once supply loosens, competition returns to graphics capability, ecosystem and licensing cost.

Sources: Nuvoton Technology Corporation Japan and Qt Group joint press release, November 5, 2026 (nuvoton.com, TSNuvotonNews-000643); Nuvoton Gerda™ HMI product page (nuvoton.com/products/dsp-isps/hmi-for-automotive-gerda/); Qt for MCUs documentation, Qt Quick Ultralite overview and Framebuffer requirements (Qt for MCUs 2.12.3); TrendForce memory contract price survey, September 30, 2026.